tinymembench v0.4.10 (simple benchmark for memory throughput and latency) ========================================================================== == Memory bandwidth tests == == == == Note 1: 1MB = 1000000 bytes == == Note 2: Results for 'copy' tests show how many bytes can be == == copied per second (adding together read and writen == == bytes would have provided twice higher numbers) == == Note 3: 2-pass copy means that we are using a small temporary buffer == == to first fetch data into it, and only then write it to the == == destination (source -> L1 cache, L1 cache -> destination) == == Note 4: If sample standard deviation exceeds 0.1%, it is shown in == == brackets == ========================================================================== C copy backwards : 8926.0 MB/s (1.8%) C copy backwards (32 byte blocks) : 9146.9 MB/s (2.0%) C copy backwards (64 byte blocks) : 9257.3 MB/s (1.5%) C copy : 10093.2 MB/s (2.3%) C copy prefetched (32 bytes step) : 10859.4 MB/s (2.6%) C copy prefetched (64 bytes step) : 10681.8 MB/s (7.3%) C 2-pass copy : 7499.0 MB/s (0.8%) C 2-pass copy prefetched (32 bytes step) : 8380.0 MB/s (5.2%) C 2-pass copy prefetched (64 bytes step) : 7970.1 MB/s (4.2%) C fill : 19232.6 MB/s (8.4%) C fill (shuffle within 16 byte blocks) : 19448.9 MB/s (5.2%) C fill (shuffle within 32 byte blocks) : 19441.4 MB/s (6.4%) C fill (shuffle within 64 byte blocks) : 18971.8 MB/s (4.4%) --- standard memcpy : 8036.5 MB/s (1.0%) standard memset : 33126.4 MB/s (7.6%) --- MOVSB copy : 8430.9 MB/s (1.9%) MOVSD copy : 8283.2 MB/s (1.6%) SSE2 copy : 10386.8 MB/s (2.2%) SSE2 nontemporal copy : 13660.7 MB/s (1.9%) SSE2 copy prefetched (32 bytes step) : 10865.2 MB/s (3.3%) SSE2 copy prefetched (64 bytes step) : 11505.4 MB/s (3.7%) SSE2 nontemporal copy prefetched (32 bytes step) : 14531.6 MB/s (2.1%) SSE2 nontemporal copy prefetched (64 bytes step) : 14257.1 MB/s (2.3%) SSE2 2-pass copy : 8556.4 MB/s (2.4%) SSE2 2-pass copy prefetched (32 bytes step) : 9159.3 MB/s (6.4%) SSE2 2-pass copy prefetched (64 bytes step) : 8878.9 MB/s (5.6%) SSE2 2-pass nontemporal copy : 4375.7 MB/s (3.1%) SSE2 fill : 19496.4 MB/s (14.2%) SSE2 nontemporal fill : 38974.5 MB/s (1.5%) ========================================================================== == Memory latency test == == == == Average time is measured for random memory accesses in the buffers == == of different sizes. The larger is the buffer, the more significant == == are relative contributions of TLB, L1/L2 cache misses and SDRAM == == accesses. For extremely large buffer sizes we are expecting to see == == page table walk with several requests to SDRAM for almost every == == memory access (though 64MiB is not nearly large enough to experience == == this effect to its fullest). == == == == Note 1: All the numbers are representing extra time, which needs to == == be added to L1 cache latency. The cycle timings for L1 cache == == latency can be usually found in the processor documentation. == == Note 2: Dual random read means that we are simultaneously performing == == two independent memory accesses at a time. In the case if == == the memory subsystem can't handle multiple outstanding == == requests, dual random read has the same timings as two == == single reads performed one after another. == ========================================================================== block size : single random read / dual random read 1024 : 0.0 ns / 0.0 ns 2048 : 0.3 ns / 0.4 ns 4096 : 0.3 ns / 0.7 ns 8192 : 0.2 ns / 0.3 ns 16384 : 0.2 ns / 0.3 ns 32768 : 0.2 ns / 0.2 ns 65536 : 1.1 ns / 1.7 ns 131072 : 1.2 ns / 1.5 ns 262144 : 1.4 ns / 1.5 ns 524288 : 5.7 ns / 7.9 ns 1048576 : 8.8 ns / 10.5 ns 2097152 : 10.8 ns / 11.3 ns 4194304 : 11.3 ns / 12.2 ns 8388608 : 13.6 ns / 14.1 ns 16777216 : 46.3 ns / 64.7 ns 33554432 : 78.9 ns / 96.4 ns 67108864 : 95.8 ns / 112.2 ns